74LVC1T45GW,125-JSM

The 74LVC1T45GW,125-JSM is a single-bit, dual-supply transceiver with tri-state outputs for bidirectional voltage-level translation. The device features two 1-bit I/O ports (A and B), a direction control input (DIR), and dual supply pins VCC(A) and VCC(B). Both VCC(A) and VCC(B) can be powered at any voltage between 1.2V and 5.5V, making the device suitable for translation between any low-voltage nodes (1.2V, 1.5V, 1.8V, 2.5V, 3.3V, and 5.0V). Pins A and DIR are referenced to VCC(A), while pin B is referenced to VCC(B). A HIGH on DIR enables transmission from A to B; a LOW on DIR enables transmission from B to A. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing any damaging backflow current when the device is powered down. When either VCC(A) or VCC(B) is at GND level in bus hold mode, both port A and port B are in a high-impedance off state.

Key features

• Wide supply voltage range: VCC(A): 1.2V to 5.5V; VCC(B): 1.2V to 5.5V
• Maximum data rate: 420 Mbps (3.3V to 5.0V translation), 210 Mbps (translation to 3.3V), 140 Mbps (translation to 2.5V), 75 Mbps (translation to 1.8V), 60 Mbps (translation to 1.5V)
• Suspend mode
• ±24mA output drive capability (VCC = 3.0V)
• Inputs accept voltages up to 5.5V
• Low power consumption: maximum ICC of 16μA
• IOFF circuitry supports partial power-down mode operation
• Operating temperature range: -40°C to +125°C
• Package: SC-88