Varnitronics
74LVC2G06GW MDD(Microdiode Semiconductor)
MDD(Microdiode Semiconductor)

74LVC2G06GW

Schmitt trigger 1.65V~5.5V 2ns@5V,50pF 4uA 2 SOT-363 Gates and Inverters

SOT-363RoHSActive
Manufacturer part #
74LVC2G06GW
Store part #
C52140490
Package / case
SOT-363
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

2,891 in stock

#C52140490

Stock & price checked 6 days ago

QuantityUnit pricePack price
1+₹21.00₹21.00
10+₹16.46₹164.60
30+₹14.51₹435.30
100+₹12.08₹1,208.00
500+₹11.01₹5,505.00
1,000+₹10.36₹10,360.00

1 × ₹21.00

₹21.00

excl. GST

₹24.78 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 3,000 per reel

74LVC2G06GW

₹21.00 for 1 + GST

Specifications

output type
Open-drain
Logic Family
74LVC
Input Type
Schmitt trigger
Voltage - Supply
1.65V~5.5V
Propagation Delay
2ns@5V,50pF
Output Logic Level - Low
800mV
Features
Power shutdown protection;Noise suppression function
Input Logic Level - Low
700mV~800mV
Operating Temperature
-40℃~+125℃
Input Logic Level - High
1.7V~2V
Quiescent Current(Iq)
4uA
Number of Channels
2
Current - Output Low(IOL)
32mA

Packaging & compliance

RoHS
RoHS
Lifecycle
Active
Packaging
Tape & Reel (TR)
Standard pack
3,000 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.073 g

Overview

The 74LVC2G06 is a dual inverter with open-drain outputs. Its inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully suited for partial power-down applications using I_OFF. The I_OFF circuit disables the outputs, preventing potentially destructive backflow current through the device when it is powered down.

Key features

  • Wide supply voltage range: 1.65V ~ 5.5V
  • Input overvoltage tolerance up to 5.5V
  • High noise immunity
  • CMOS low power consumption
  • I_OFF circuit for partial power-down mode operation
  • 24mA output drive capability (V_CC = 3.0V)
  • Latch-up performance exceeds 100mA
  • Direct TTL-level interface compatible
  • JEDEC standard compliant
  • ESD protection
  • Multiple package options
  • Inverter with open-drain output

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