74LVC2T45DC,125-JSM

This device is a 2-bit dual-supply voltage-translating transceiver with 3-state outputs that enables bidirectional level shifting. It features two 2-bit I/O ports (nA and nB), a direction control input (DIR), and two independent supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be powered at any voltage between 1.2V and 5.5V, making this device suitable for translation between various low-voltage nodes such as 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, and 5.0V. The nA and DIR pins are powered by VCC(A), while the nB pins are powered by VCC(B). When DIR is HIGH, data flows from nA to nB; when DIR is LOW, data flows from nB to nA. The IOFF circuitry makes this device ideal for applications with partial power-down capability. This circuit disables the outputs when powered down, preventing damaging backflow current. In suspend mode, when VCC(A) or VCC(B) is at GND level, both port A and port B are placed in a high-impedance state.

Key features

• Wide supply voltage range: VCC(A): 1.2V ~ 5.5V; VCC(B): 1.2V ~ 5.5V
• High data rate: up to 420 Mbps at 3.3V input, 5.0V output; up to 210 Mbps at 1.2V ~ 5.5V input, 3.3V output; up to 140 Mbps at 1.2V ~ 5.5V input, 2.5V output; up to 75 Mbps at 1.2V ~ 5.5V input, 1.8V output; up to 60 Mbps at 1.2V ~ 5.5V input, 1.5V output
• Supports suspend mode
• ±24mA output drive capability (at VCC = 3.0V)
• Input voltage tolerance up to 5.5V
• Low power consumption: maximum ICC of 16uA
• Integrated IOFF circuitry for partial power-down operation
• Wide operating temperature range: -40°C ~ +125°C
• Package: VSSOP8