CD4094BDRG

CD4094B is an 8-bit serial shift register with a storage latch for each bit, providing serial-in to parallel-buffered three-state output strobed data. The parallel outputs can be connected directly to a common bus. Data shifting begins on the rising edge of the input clock. When STROBE is high, data in each shift register stage is transferred to the storage register. When the OUTPUT ENABLE signal is simultaneously high, the data in the storage register appears at the outputs. Two serial cascade outputs (QS and Q'S) are available for cascading multiple CD4094B devices. Data can be obtained from the QS serial output on the rising edge of the clock, enabling high-speed operation in cascaded systems with fast clock rise times. When the clock rise time is slow in a cascaded system, the Q'S output can be used to obtain the same serial data on the next falling clock edge. The QS output begins on the rising edge of the 9th serial clock pulse, and the Q'S output begins on the falling edge of the 9th serial clock pulse.

Applications

• Serial-to-parallel data conversion
• Remote-controlled storage registers
• Dual-stage shift, storage, and bus applications

Key features

• Wide operating voltage: 3V to 15V
• Three voltage options: 5V, 10V, 15V
• Fully static operation
• Three-state output
• Standardized symmetrical output characteristics
• High noise immunity: 0.45VDD (Typ.)
• TTL-compatible input levels
• Operating temperature range: -40°C to +85°C
• Package types: DIP-16, SOP-16, TSSOP-16