Varnitronics
CD4094BDTR(XBLW) XBLW
XBLW

CD4094BDTR(XBLW)

3V~15V 1 6.8mA 270ns@15V,50pF Serial-to-Parallel SOP-16 Shift Registers RoHS

SOP-16ROHS CompliantActive

8-stage Shift-and-store Bus Register

Manufacturer
XBLW
Manufacturer part #
CD4094BDTR(XBLW)
Store part #
C18723494
Package / case
SOP-16
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

3,380 in stock

#C18723494

Stock & price checked 6 days ago

QuantityUnit pricePack price
5+₹16.68₹83.40
50+₹13.31₹665.50
150+₹11.62₹1,743.00
500+₹10.35₹5,175.00
2,500+₹9.33₹23,325.00
5,000+₹8.81₹44,050.00

5 × ₹16.68

₹83.40

excl. GST

₹98.41 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 2,500 per reel

CD4094BDTR(XBLW)

₹83.40 for 5 + GST

Specifications

Operating temperature
-40℃~+85℃
Pd - Power Dissipation
500mW
Voltage - Supply
3V~15V
Output Type
Tri-State
Current - Output High(IOH)
6.8mA
Series
CD40
Current - Output Low(IOL)
6.8mA
Number of Elements
1
Output Current
6.8mA
Features
Output enable
Propagation Delay
270ns@15V,50pF
Function
Serial-to-Parallel

Packaging & compliance

RoHS
ROHS Compliant
Lifecycle
Active
Packaging
Tape & Reel (TR)
Standard pack
2,500 / Reel
Sold per
Piece
Minimum order
5 (multiples of 5)
Unit weight
0.297 g

Overview

The CD4094 is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs QPO to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive-going clock transitions. The data in each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the output enable (OE) signal is HIGH. Two serial outputs (QS1 and QS2) are available for cascading a number of CD4094 devices. Serial data is available at Qs1 on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock rise time. The same serial data is available at Qs2 on the next negative going clock edge. This is used for cascading CD4094 devices when the clock has a slow rise time. It operates over a recommended VDD power supply range of 3V to 15V referenced to Vss (usually ground). Unused inputs must be connected to VDD, ΔVS, or another input.

Applications

  • Serial-to-parallel data conversion
  • Remote control holding register
  • Dual-rank shift, hold, and bus applications

Key features

  • Wide supply voltage range from 3V to 15V
  • Fully static operation
  • 5V, 10V, and 15V parametric ratings
  • Standardized symmetrical oSOPutput characteristics
  • Specified from -40℃ to +125℃
  • Packaging information: DIP16/SOP16/TSSO16

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Similar parts — check the datasheet before substituting.

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