CS2100CP-CZZR

The CS2100-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. It is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for generation of a low-jitter clock relative to an external noisy synchronization clock at frequencies as low as 50 Hz. The CS2100-CP supports both I²C and SPI for full software control.

Key features

• Clock Multiplier / Jitter Reduction Generates a Low Jitter 6 - 75 MHz Clock from a Jittery or Intermittent 50 Hz to 30 MHz Clock Source
• Highly Accurate PLL Multiplication Factor Maximum Error Less Than 1 PPM in HighResolution Mode
• I²C / SPI Control Port
• Configurable Auxiliary Output
• Flexible Sourcing of Reference Clock External Oscillator or Clock Source – Supports Inexpensive Local Crystal
• Minimal Board Space Required No External Analog Loop-filter Components