DRV8306HRSMR

The DRV8306 device is an integrated gate driver suitable for three-phase brushless DC (BLDC) motor applications. This device features three half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The DRV8306 device uses an integrated charge pump to generate an appropriate gate drive voltage for the high-side MOSFETs and a linear regulator to generate an appropriate gate drive voltage for the low-side MOSFETs. The intelligent gate drive architecture supports a peak gate drive sourcing current of up to 150mA, a peak gate drive sinking current of 300mA, and a 15mA rms gate drive current capability. This device provides internal 120° commutation for trapezoidal BLDC motors. The DRV8306 device has three Hall comparators that use inputs from Hall elements for internal commutation. The duty cycle of the motor phase voltage can be adjusted via the PWM pin. The additional brake (nBRAKE) and direction (DIR) pins can be used to brake the BLDC motor and set the motor direction. The provided 3.3V, 30mA low-dropout (LDO) regulator can be used to power external controllers and Hall elements. Additionally, an extra FGOUT signal is provided to measure the commutation frequency. This signal can be used to implement closed-loop control of the BLDC motor. A low-power sleep mode is provided to achieve lower quiescent current consumption by shutting down most of the internal circuitry. Internal protection features are provided for conditions such as undervoltage lockout, charge pump failure, MOSFET overcurrent, MOSFET short circuit, gate driver failure, and overheating. Fault conditions are indicated via the nFAULT pin.

Applications

• BLDC motor module
• Service robots
• Vacuum cleaners
• Drones, robots, and RC toys
• White goods
• ATMs and banknote counters

Key features

• 6V to 38V three-half-bridge gate driver with 3 integrated Hall comparators
• 40V absolute maximum rating
• Fully optimized for 12V and 24V DC power rails
• Drives high-side and low-side N-channel MOSFETs
• Supports 100% PWM duty cycle
• Smart gate drive architecture
• Enhanced EMI and EMC performance via adjustable slew rate control
• Shoot-through prevention via VGS handshaking and minimum dead-time insertion
• 15mA to 150mA peak source current
• 30mA to 300mA peak sink current
• Hall sensor-based commutation integration
• 120° trapezoidal current control
• Supports low-cost Hall elements
• Closed-loop speed control via speed output signal (FGOUT)
• Integrated gate driver supply: high-side charge pump and low-side LDO
• Cycle-by-cycle current limiting
• Supports 1.8V, 3.3V, and 5V logic inputs
• Low-power sleep mode
• 3.3V, 30mA LDO
• Compact VQFN package and form factor
• Integrated protection features
• VM undervoltage lockout (UVLO)
• Charge pump undervoltage (CPUV)
• MOSFET overcurrent protection (OCP)
• Gate driver fault (GDF)
• Thermal shutdown (OTSD)
• Fault status indicator (nFAULT)