DS90UB948TNKDRQ1

The DS90UB948-Q1 is an FPD-Link III deserializer. When used in conjunction with the DS90UB949A/949/947-Q1 serializer, it can convert single-channel or dual-channel FPD-Link III streams into the FPD-Link (OpenLDI) interface format. This deserializer can operate on cost-effective 50Ω single-ended coaxial or 100Ω differential shielded twisted pair (STP) cables. It can recover data from single-channel or dual-channel FPD-Link III serial streams and then convert it into dual-pixel FPD-Link (8 LVDS data channels + clock), supporting a maximum video resolution of 2K (2048×1080) with 24-bit color depth. This provides a bridge between various HDMI-enabled sources (such as CPUs) for connection to existing LVDS displays or application processors. The FPD-Link III interface supports the transmission of video and audio data and full-duplex control (including I2C and SPI communication) over the same differential link. Integrating video data and control through two differential pairs reduces the size and weight of the interconnection lines and simplifies system design. Electromagnetic interference (EMI) is minimized through the use of low-voltage differential signaling, data reordering, and random generation. In backward-compatible mode, this device can support a maximum resolution of WXGA and 720p (24-bit color depth) on a single differential link. The device automatically detects FPD-Link III channels and provides a clock alignment and offset compensation function without the need for any special training mode. This ensures that the phase offset remains within tolerance when there are mismatch issues in the interconnection lines (e.g., PCB traces), differences in cable pair lengths, and connector imbalances.

Applications

• Automotive infotainment: central information display, rear-seat entertainment system, digital instrument cluster

Key features

• Qualified for automotive applications
• AEC Q100 qualified with the following results: Device Temperature Grade 2: -40°C to +105°C ambient operating temperature range
• Supports pixel clock frequencies up to 192MHz, enabling resolutions up to 2K (2048x1080) at 24-bit color depth
• Single- or dual-channel FPD-Link III interface with offset compensation capability
• Single- or dual-channel OpenLDI (LVDS) transmitter
• Single channel: pixel clock up to 96MHz; Dual channel: pixel clock up to 192MHz; Configurable 18-bit RGB or 24-bit RGB
• Four high-speed GPIO channels (up to 2Mbps per channel)
• Adaptive receive equalization
• Channel insertion loss compensation up to –15.3dB at 1.7GHz; automatic temperature and cable aging compensation provided
• SPI control interface rate up to 3.3Mbps
• I2C (master/slave) with 1Mbps Fast Mode Plus
• Image enhancement features (white balance and dithering)
• Supports 7.1 multi-channel I2S (4 data channels)