EnergyMath

EM74LVC10APW

NAND Gate IC 3 Channel TSSOP-14L

TSSOP-14LRoHSActive

Triple 3-input NAND gate

Manufacturer: EnergyMath
Manufacturer part #: EM74LVC10APW
Store part #: C49188171
Package / case: TSSOP-14L
Category: Gates and Inverters
Packaging: Tape & Reel (TR)

Datasheet (PDF)

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2,975 in stock

#C49188171

Stock & price checked 5 days ago

Quantity	Unit price	Pack price
5+	₹20.65	₹103.25
50+	₹16.22	₹811.00
150+	₹14.31	₹2,146.50
500+	₹11.95	₹5,975.00
3,000+	₹10.89	₹32,670.00
6,000+	₹10.25	₹61,500.00

Quantity (min 5, multiples of 5)

5 × ₹20.65

₹103.25

excl. GST

₹121.84 incl. 18% GST

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Standard pack: 3,000 per reel

EM74LVC10APW

₹103.25 for 5 + GST

Specifications

Input Type: Schmitt trigger;TTL-compatible CMOS
Logic Family: 74LVC
Voltage - Supply: 1.65V~5.5V
Propagation Delay: 3.3ns@5V,15pF
Output Logic Level - Low: 450mV;300mV;400mV;550mV
Features: Local shutdown mode;Overvoltage-tolerant input
Input Logic Level - Low: 700mV;800mV
Operating Temperature: -40℃~+125℃
Input Logic Level - High: 1.7V;2V
Output Logic Level - High: 1.2V;1.9V;2.2V;2.4V;3.8V
Quiescent Current(Iq): 40uA
Number of Channels: 3;3
Current - Output High(IOH): 32mA
Current - Output Low(IOL): 32mA

Packaging & compliance

RoHS: RoHS
Lifecycle: Active
Packaging: Tape & Reel (TR)
Standard pack: 3,000 / Reel
Sold per: Piece
Minimum order: 5 (multiples of 5)
Unit weight: 0.148 g

Overview

The EM74LVC10A provides three 3-input NAND gate functions. Inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. Schmitt-trigger inputs on all input pins make the circuit tolerant of slower input rise and fall times. The device is fully specified for partial-power-down applications using I_OFF. The I_OFF circuitry disables the outputs, preventing potentially damaging backflow current when the device is powered down.

Key features

Wide supply voltage range: 1.2V to 5.5V
Input overvoltage tolerance up to 5.5V
CMOS low power consumption
I_OFF circuitry enables partial power-down mode operation
Latch-up performance exceeds 250mA
Direct interface with TTL levels
JEDEC standards compliant: JESD8-7A (1.65V to 1.95V), JESD8-5A (2.3V to 2.7V), JESD8-C (2.7V to 3.6V), JESD36 (4.5V to 5.5V)
ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 6000V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
Multiple package options

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