NXP
TJA1043T/1J4.5V~5.5V CAN FD Transceiver 5Mbps SOIC-14 Drivers, Receivers, Transceivers RoHS
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CAN FD Transceiver 4.75V~5.25V 5Mbps SOIC-8 Drivers, Receivers, Transceivers
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100% Authentic · 30-Day Return or Replacement · policy
3,961 in stock
#C51883380
Stock & price checked 6 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹103.22 | ₹103.22 |
| 10+ | ₹91.95 | ₹919.50 |
| 30+ | ₹86.31 | ₹2,589.30 |
| 100+ | ₹80.68 | ₹8,068.00 |
| 500+ | ₹77.42 | ₹38,710.00 |
| 1,000+ | ₹75.69 | ₹75,690.00 |
1 × ₹103.22
₹103.22
excl. GST
₹121.80 incl. 18% GST
H7344AD10
₹103.22 for 1 + GST
The H7344 provides two operating modes, as shown in Table 2. These modes are selectable via the STB pin. In normal mode, the transceiver is able to communicate via the bus lines. Signals are transmitted and received to the CAN controller via the TxD and RxD pins. The slew rate at the bus line outputs is optimized for low EMI. In standby mode, both the transmitter and receiver are disabled, and an ultra-low-power differential receiver monitors the bus lines for CAN bus activity. The bus lines are biased to ground, and the supply current is reduced to a minimum, with a typical value of 10μA. When the low-power differential receiver detects a wake-up request, the signal is first filtered and then validated as a valid wake-up signal after the twake_filt time period, after which the transceiver drives the RxD pin low (following the bus) to notify the controller of the wake-up request. When a valid wake-up pattern (dominant-recessive-dominant phases in sequence) is detected in standby mode, the RxD pin follows the bus. The minimum length of each phase is twake_filt. This pattern must be received within the twake_to time to be recognized as a valid wake-up; otherwise, the internal logic will be reset. The thermal protection circuit protects the IC from damage by shutting down the transmitter when the junction temperature exceeds approximately 180°C. Since the transmitter dissipates most of the power, the IC power consumption and temperature are reduced. All other IC functions continue to operate. The transmitter shutdown state is reset when the temperature falls below the shutdown threshold and the TxD pin goes high. The TxD dominant timeout timer circuit prevents the bus lines from being driven to a permanent dominant state (blocking all network communication) when the TxD pin is forced permanently low due to hardware and/or software application faults.
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