PCF8563T-5,518-JSM

PCF8563T/5,518-JSM is a low-power CMOS RTC/calendar chip featuring a programmable clock output, interrupt output, and power-down detector. All addresses and data are transferred serially via the I²C bus interface at a maximum bus speed of 400 Kbit/s. The integrated word address register increments automatically after each read/write operation. Widely used in battery-powered products such as mobile phones, portable instruments, and fax machines, this chip comes in an SOP8 package.

Key features

• Low standby current: typical 0.25 μA (VDD = 3 V @ 25 ℃)
• Clock operating voltage range: 1.0 V ~ 5.5 V (Tamb = 25 ℃)
• 400 kHz I²C bus interface (VDD = 1.8 V ~ 5.5 V)
• Programmable clock output frequency
• Internal integrated oscillator capacitor
• Alarm and timer functions
• Internal power-on reset
• Open-drain interrupt output pin
• I²C bus slave address: read address 0A3H, write address 0A2H