PCF8563T-S-JSM

PCF8563T-S-JSM is a low-power CMOS real-time clock/calendar chip featuring a programmable clock output, interrupt output, and power-down detector. All addresses and data are transferred serially via the I²C bus interface at a maximum bus speed of 400 Kbits/s; the built-in word address register auto-increments after each read/write operation. The chip integrates 16 8-bit registers, an auto-incrementing address register, an on-chip 32.768 kHz oscillator (with internal integrated capacitors), a frequency divider, programmable clock output, timer, alarm, power-down detector, and a 400 kHz I²C bus interface. All 16 registers are designed as addressable 8-bit parallel registers, though not all bits are used. The first two registers serve as control and status registers; addresses 02H–08H are used for clock counters; addresses 09H–0CH for alarm registers; address 0DH controls the output frequency of the CLKOUT pin; addresses 0EH and 0FH serve as the timer control register and timer register, respectively. The seconds, minutes, hours, day, month, year, minute alarm, hour alarm, and day alarm registers are BCD-encoded; the weekday and weekday alarm registers are not BCD-encoded.

Applications

• Portable media players
• Mobile phones
• Multi-rate electricity meters, IC card water meters, IC card gas meters
• Fax machines
• Security electronics

Key features

• Timekeeping of seconds, minutes, hours, day of week, date, month, and year based on 32.768kHz crystal
• Century flag
• Wide supply voltage range: 2.5~5.5V
• Low standby current: typical 0.25μA (VDD = 3.0V, TA = 25℃)
• I²C bus slave address: read, 0A3H; write, 0A2H
• Programmable clock output frequencies: 32.768kHz, 1024Hz, 32Hz, 1Hz
• Alarm and timer functions
• Power-fail detector
• On-chip integrated oscillator capacitor
• Open-drain interrupt pin