TCA9517ADGKR

The TCA9517A is a bidirectional buffer with level-shifting capability for I²C and SMBus systems. It enables bidirectional voltage level translation (step-up/step-down) between low voltages (as low as 0.9V) and high voltages (2.7V to 5.5V) in mixed-mode applications. The device extends I²C and SMBus systems without impacting system performance, even during level translation. The TCA9517A buffers the SDA and SCL signals on the I²C bus, allowing both buses in an I²C application to support bus capacitance up to 400pF. The TCA9517A features two types of drivers: Side-A drivers and Side-B drivers. All inputs and I/Os are 5.5V overvoltage tolerant, even when the device is powered down (VCCB and/or VCCA = 0V). The TCA9517A has a higher contention level threshold (VILC) than the TCA9517, allowing connection of slave devices with weaker pull-down capability. The buffer design type on Side B prevents its use with devices that have a static voltage offset. This is because such devices do not recognize the buffered low-level signal as a valid logic low, and therefore do not pass it as a buffered low level. The Side-B drivers operate at voltages between 2.7V and 5.5V. The output low level for this internal buffer is approximately 0.5V; however, when the output is internally driven low, the input voltage must be at least 70mV below the output low level. Higher-voltage low signals are referred to as buffered low levels. When a Side-B I/O is internally driven low, the input does not recognize this low level as a logic low. This characteristic prevents latch-up when the input low state is released. The Side-A drivers operate at voltages between 0.9V and 5.5V and can sink larger currents. They do not require the buffered low-level characteristic (or static offset voltage). This means that a low-level signal on Side B is translated to a low level close to 0V on Side A, accommodating the smaller voltage swing of low-voltage logic. The output pull-down on Side A drives a "hard" low level, and the input threshold is set at 0.3×VCCA to meet the lower VOL requirements of systems with low-side supply voltages as low as 0.9V. Two or more TCA9517A devices can be connected together on the A side to form various topologies, with Side A serving as the common bus. Additionally, Side A can be directly connected to any other buffer with a static or dynamic offset voltage. Multiple TCA9517A devices can be daisy-chained (with adjacent devices connected via Side A and Side B); the offset voltage does not accumulate — only flight time delay needs to be considered. Due to the buffered low-voltage characteristic of Side B, TCA9517A devices cannot be interconnected via Side B. Side B must not be connected to devices equipped with rise-time accelerators. VCCA is used solely to provide the 0.3×VCCA reference voltage for the Side-A input comparator or for the power-good detection circuit. The TCA9517A logic and all I/Os are powered by the VCCB pin. When used with standard I²C systems, pull-up resistors are required on the buffered buses to provide a logic high level. The TCA9517A uses the standard open-drain configuration for the I²C bus. The sizing of these pull-up resistors is system-dependent; however, each side of the repeater must have a pull-up resistor. This device is designed to work with Standard-Mode and Fast-Mode I²C devices, not just SMBus devices. In general-purpose IC systems that support Standard-Mode devices and multiple masters, Standard-Mode I²C devices are rated for only 3mA. Higher termination currents may be used under specific conditions.

Applications

• Servers
• Routers (telecom switching equipment)
• Industrial equipment
• Products with multiple I2C slave devices and/or long PCB traces

Key features

• Dual-channel bidirectional buffer
• Compatible with I²C bus and SMBus
• Side A operating supply voltage range: 0.9V to 5.5V
• Side B operating supply voltage range: 2.7V to 5.5V
• Voltage level translation from 0.9V–5.5V to 2.7V–5.5V
• Pin-compatible and functional drop-in replacement for PCA9515B
• Active-high repeater enable input
• Open-drain I2C I/O
• 5.5V tolerant I²C and enable inputs support mixed-mode signal operation
• Compatible with Standard-mode and Fast-mode I²C devices and multimaster configurations
• I²C pins go high-impedance when device is powered down
• Latch-up performance exceeds 100mA per JESD 78 Class II
• ESD protection exceeds JESD 22: 5500V HBM (A114-A), 200V MM (A115-A), 1000V CDM (C101)