Varnitronics
THC63LVDM83D THine Elec
THine Elec

THC63LVDM83D

1.12Gbps 3V~3.6V TSSOP-56 Serializers, Deserializers RoHS

TSSOP-56ROHS CompliantActive
Manufacturer
THine Elec
Manufacturer part #
THC63LVDM83D
Store part #
C22445426
Package / case
TSSOP-56
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

2,061 in stock

#C22445426

Stock & price checked 5 days ago

QuantityUnit pricePack price
1+₹199.96₹199.96
10+₹163.88₹1,638.80
30+₹144.33₹4,329.90
100+₹129.55₹12,955.00
500+₹119.55₹59,775.00
1,500+₹114.98₹1,72,470.00

1 × ₹199.96

₹199.96

excl. GST

₹235.95 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 1,500 per reel

THC63LVDM83D

₹199.96 for 1 + GST

Specifications

Data Rate
1.12Gbps
Voltage - Supply
3V~3.6V
Features
Configurable output swing;Low power standby / automatic shutdown on failure
Operating Temperature
0℃~+70℃
Level Standard
LVDS;LVCMOS

Packaging & compliance

RoHS
ROHS Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
1,500 / Reel
Sold per
Piece
Minimum order
1
Unit weight
1 g

Overview

The THC63LVDM83D transmitter is designed to support pixel data transmission at resolutions up to 1080p/WUXGA between a host and flat panel displays. The device converts 28-bit LVCMOS data into four OpenLDI (LVDS) data streams. Rising-edge or falling-edge clock triggering can be selected via dedicated pin programming. At a transmission clock frequency of 160MHz, 24-bit RGB data and 4-bit timing control data (HSYNC, VSYNC, DE, CONT1) are transmitted at an effective rate of 1120Mbps per OpenLDI (LVDS) channel.

Applications

  • Tablet
  • Laptop
  • Security Camera
  • Industrial Camera
  • Multifunction Printer

Key features

  • TIA/EIA-644 LVDS standard compatible
  • 7:1 OpenLDI (LVDS) transmitter
  • Operating temperature range: 0 to +70°C
  • No special power-up sequence required
  • Spread spectrum clock tolerance up to 100kHz frequency modulation with ±2.5% deviation
  • Wide pixel clock range: 8MHz to 160MHz, supporting video: NTSC (12.27MHz) – 1080p (148.5MHz); PC: QVGA (8MHz) – WUXGA (154MHz)
  • 56-pin TSSOP package
  • 1.2V to 3.3V LVCMOS input support
  • LVDS swing reducible to 200mV via RS pin for lower EMI and power consumption
  • PLL requires no external components
  • Power-down mode
  • Input clock trigger edge selectable via R/F pin
  • EU RoHS compliant

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