TPS74401RGRR

The TPS74401 low-dropout (LDO) linear regulator provides an easy-to-use, robust power management solution for a wide range of applications. The user-programmable soft-start feature reduces capacitive inrush current during startup, minimizing stress on the input power supply. The monotonic soft-start behavior makes it well-suited for powering processors and ASICs. Power-up sequencing with external regulators is easily implemented using the enable input and power-good output. This flexibility allows users to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with specific startup requirements. The device also features a high-accuracy voltage reference and error amplifier, delivering 1% accuracy across the full load, line, temperature, and process ranges. The TPS74401 family of LDOs operates stably with no output capacitor or with ceramic output capacitors. The device family is rated for an operating junction temperature range of TJ = -40°C to 125°C. The TPS74401 is available in two 20-pin compact VQFN packages — a 5mm × 5mm RGW and a 3.5mm × 3.5mm RGR — enabling a highly compact overall solution footprint. A DDPAK (KTW) package is also available for applications requiring additional power dissipation.

Applications

• FPGA applications
• DSP core and I/O voltage
• Post-regulation applications
• Applications with specific startup time or sequencing requirements
• Hot-swap and inrush control

Key features

• Input voltage range: 1.1V to 5.5V
• Soft-start (SS) pin enables linear startup with ramp time set by external capacitor
• 1% accuracy over line, load, and temperature
• Input voltage down to 0.9V supported with external bias supply
• Adjustable output voltage range: 0.8V to 3.6V
• Ultra-low dropout: 115mV (typical) at 3.0A
• Stable with any output capacitor or no output capacitor
• Excellent transient response
• Open-drain power-good output (VQFN only)
• Packages: 5mm × 5mm × 1mm VQFN (RGW), 3.5mm × 3.5mm VQFN (RGR), and DDPAK