JSMSEMI

74ALVC164245DGG:11-JSM

TTL-compatible CMOS 16 2 2.9ns@5V,50pF TSSOP-48 Buffers, Drivers, Receivers, Transceivers RoHS

TSSOP-48ROHS CompliantActive

Manufacturer: JSMSEMI
Manufacturer part #: 74ALVC164245DGG:11-JSM
Store part #: C53436298
Package / case: TSSOP-48
Category: Buffers, Drivers, Receivers, Transceivers
Packaging: Tape & Reel (TR)

Datasheet (PDF)

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4,554 in stock

#C53436298

Stock & price checked 23 h ago

Quantity	Unit price	Pack price
1+	₹70.41	₹70.41
10+	₹62.80	₹628.00
30+	₹59.11	₹1,773.30
100+	₹55.20	₹5,520.00
500+	₹53.03	₹26,515.00
1,000+	₹51.73	₹51,730.00

Quantity (min 1)

1 × ₹70.41

₹70.41

excl. GST

₹83.08 incl. 18% GST

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Standard pack: 2,000 per reel

74ALVC164245DGG:11-JSM

₹70.41 for 1 + GST

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Specifications

Input type: TTL-compatible CMOS
Current - Output High(IOH): 50mA
Voltage - Supply: 1.5V~3.6V;1.2V~5.5V
Series: 74ALVC
Output Type: Tri-State
Current - Output Low(IOL): 50mA
Number of Bits per Element: 16
Channel Type: Bidirectional
Number of Elements: 2
Operating Temperature: -40℃~+125℃
Quiescent Supply Current: 80uA
Propagation Delay: 2.9ns@5V,50pF

Packaging & compliance

RoHS: ROHS Compliant
Lifecycle: Active
Packaging: Tape & Reel (TR)
Standard pack: 2,000 / Reel
Sold per: Piece
Minimum order: 1
Unit weight: 0.512 g

Overview

74ALVC164245DGG:11-JSM is a high-performance, low-power, low-voltage silicon-gate CMOS device, superior to most advanced TTL-compatible CMOS families. It is a dual-supply 16-bit bus transceiver with 3-state control, designed to interface between 3V and 5V buses in mixed 3V/5V supply environments. The device can be used as two 8-bit transceivers or one 16-bit transceiver. The direction control inputs (1DIR and 2DIR) determine the direction of data flow. nDIR (HIGH) enables data transmission from port nAn to port nBn; nDIR (LOW) enables data transmission from port nBn to port nAn. When the output enable inputs (1OE and 2OE) are HIGH, ports nAn and nBn are disabled by placing them in a high-impedance state. Ports nAn, nOE, and nDIR are powered by VCC(A); port nBn is powered by VCC(B). In power-down mode, when one of the supply voltages is zero, no current will flow from the non-zero supply to the zero supply. The nAn outputs must be set to high-impedance state, and the voltage on the A bus must be less than Vdiode (typical value 0.7V). VCC(B) ≥ VCC(A) (except in power-down mode).

Key features

5V tolerant I/O for 5V logic interfacing
Wide supply voltage range: 3V port (VCC(A)): 1.5V ~ 3.6V; 5V port (VCC(B)): 1.2V ~ 5.5V
CMOS low power consumption
TTL-compatible logic levels
Control input voltage range: 2.7V ~ 5.5V
Input voltage up to 5.5V
High-impedance output when VCC(A) or VCC(B) = 0V
Temperature range: -40°C ~ +125°C
Package: TSSOP48/SSOP48

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