74AUP1G08GS,132

Schmitt trigger 800mV~3.6V 6.2ns@3.6V,30pF 900nA XSON-6(1x1) Gates and Inverters RoHS

XSON-6(1x1)ROHS3 CompliantActive

Low-power 2-input AND gate

Manufacturer: Nexperia
Manufacturer part #: 74AUP1G08GS,132
Store part #: C554940
Package / case: XSON-6(1x1)
Category: Gates and Inverters
Packaging: Tape & Reel (TR)

Datasheet (PDF)

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4,035 in stock

#C554940

Stock & price checked 28 h ago

Quantity	Unit price	Pack price
5+	₹18.14	₹90.70
50+	₹15.88	₹794.00
150+	₹14.92	₹2,238.00
500+	₹13.72	₹6,860.00
2,500+	₹13.18	₹32,950.00
5,000+	₹12.86	₹64,300.00

Quantity (min 5, multiples of 5)

5 × ₹18.14

₹90.70

excl. GST

₹107.03 incl. 18% GST

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Standard pack: 5,000 per reel

74AUP1G08GS,132

₹90.70 for 5 + GST

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Specifications

Input Type: Schmitt trigger
Logic Family: 74AUP
Voltage - Supply: 800mV~3.6V
Output Logic Level - Low: 440mV
Propagation Delay: 6.2ns@3.6V,30pF
Features: Local shutdown mode;Overvoltage-tolerant input
Input Logic Level - Low: 900mV
Input Logic Level - High: 1.6V;2V
Operating Temperature: -40℃~+125℃
Output Logic Level - High: 2.6V
Quiescent Current(Iq): 900nA
Current - Output High(IOH): 4mA
Number of Channels: 1;2
Current - Output Low(IOL): 4mA

Packaging & compliance

RoHS: ROHS3 Compliant
Lifecycle: Active
Moisture sensitivity: MSL 1 (unlimited)
ECCN: EAR99
Packaging: Tape & Reel (TR)
Standard pack: 5,000 / Reel
Sold per: Piece
Minimum order: 5 (multiples of 5)
Unit weight: 0.03 g

Overview

The 74AUP1G08 is a single 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using lOFF. The lOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Key features

Wide supply voltage range from 0.8 V to 3.6 V
CMOS low power dissipation
High noise immunity
Overvoltage tolerant inputs to 3.6 V
Low noise overshoot and undershoot <10 % of VCC
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Low static power consumption; lCC = 0.9 μA (maximum)
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

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