Varnitronics
74LVC1G97GW MDD(Microdiode Semiconductor)
MDD(Microdiode Semiconductor)

74LVC1G97GW

Schmitt trigger 1.65V~5.5V 5.5ns@4.5V,50pF 100nA SOT-363 Gates and Inverters

SOT-363RoHSActive
Manufacturer part #
74LVC1G97GW
Store part #
C52953355
Package / case
SOT-363
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

2,470 in stock

#C52953355

Stock & price checked 6 days ago

QuantityUnit pricePack price
5+₹14.61₹73.05
50+₹11.51₹575.50
150+₹9.98₹1,497.00
500+₹8.81₹4,405.00
3,000+₹7.89₹23,670.00
6,000+₹7.42₹44,520.00

5 × ₹14.61

₹73.05

excl. GST

₹86.20 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 3,000 per reel

74LVC1G97GW

₹73.05 for 5 + GST

Specifications

Input Type
Schmitt trigger
Logic Family
74LVC
Voltage - Supply
1.65V~5.5V
Propagation Delay
5.5ns@4.5V,50pF
Operating Temperature
-40℃~+125℃
Features
Local shutdown mode;Overvoltage-tolerant input
Quiescent Current(Iq)
100nA
Number of Channels
1;3
Current - Output High(IOH)
32mA
Current - Output Low(IOL)
32mA

Packaging & compliance

RoHS
RoHS
Lifecycle
Active
Packaging
Tape & Reel (TR)
Standard pack
3,000 / Reel
Sold per
Piece
Minimum order
5 (multiples of 5)
Unit weight
0.073 g

Overview

The 74LVC1G97 is a configurable multi-function logic gate with Schmitt-trigger inputs. The device can be configured via 3-bit inputs to implement any of the following logic functions: multiplexer, AND, OR, NAND, NOR, inverter, and buffer. All inputs can be connected directly to VCC or GND. Inputs can be driven by 3.3V or 5V devices, allowing these devices to be used as level translators in mixed 3.3V and 5V environments. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs when the device is powered down, preventing potentially harmful backflow current from flowing through the device.

Key features

  • Wide supply voltage range: 1.65V to 5.5V
  • Input overvoltage tolerance up to 5.5V
  • High noise immunity
  • ±24 mA output drive capability (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 200 mA
  • Direct TTL-level interface compatible
  • IOFF circuit supports partial power-down mode operation
  • JEDEC standards compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8B/JESD36 (2.7 V to 3.6 V)
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
  • Multiple package options

Alternatives

Similar parts — check the datasheet before substituting.

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