Varnitronics
74LVC2G34GW MDD(Microdiode Semiconductor)
MDD(Microdiode Semiconductor)

74LVC2G34GW

Schmitt trigger 1.65V~5.5V 2 2 2.5ns@3.3V,50pF SOT-363 Buffers, Drivers, Receivers, Transceivers

SOT-363RoHSActive
Manufacturer part #
74LVC2G34GW
Store part #
C52140488
Package / case
SOT-363
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

4,901 in stock

#C52140488

Stock & price checked 6 days ago

QuantityUnit pricePack price
1+₹16.64₹16.64
10+₹13.11₹131.10
30+₹11.35₹340.50
100+₹10.04₹1,004.00
500+₹8.98₹4,490.00
1,000+₹8.45₹8,450.00

1 × ₹16.64

₹16.64

excl. GST

₹19.64 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
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  • Standard pack: 3,000 per reel

74LVC2G34GW

₹16.64 for 1 + GST

Specifications

Input type
Schmitt trigger
Voltage - Supply
1.65V~5.5V
Operating Temperature
-40℃~+125℃
Quiescent Supply Current
4uA
Function
Power-off isolation;Level shifting
Current - Output High(IOH)
24mA
Series
74LVC
Current - Output Low(IOL)
24mA
Number of Bits per Element
2
Channel Type
Unidirectional
Number of Elements
2
Propagation Delay
2.5ns@3.3V,50pF

Packaging & compliance

RoHS
RoHS
Lifecycle
Active
Packaging
Tape & Reel (TR)
Standard pack
3,000 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.072 g

Overview

The 74LVC2G34 is a dual buffer. Its inputs can be driven by 3.3V or 5V devices, allowing the device to be used as a level translator in mixed 3.3V and 5V environments. All inputs feature Schmitt-trigger action, enabling the circuit to tolerate slow input rise and fall times. The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuit disables the outputs, preventing damaging backflow current when the device is powered down.

Key features

  • Wide supply voltage range: 1.65 V to 5.5 V
  • Input overvoltage tolerance up to 5.5 V
  • High noise immunity
  • Output drive capability ±24 mA (VCC = 3.0 V)
  • CMOS low power consumption
  • Direct TTL-level interface compatible
  • I_OFF circuit for partial power-down mode operation
  • Latch-up performance exceeds 100 mA
  • JEDEC compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.6 V to 5.5 V)
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V; MM JESD22-A115C Class C exceeds 550 V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
  • Multiple package options
  • Dual-buffered gates

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