Varnitronics
ADI

AD9249BBCZRL7-65

Serial port 1.7V~1.9V CSPBGA-144(10x10) Analog to Digital Converters (ADC) RoHS

CSPBGA-144(10x10)ROHS3 CompliantActive

16 Channel, 14-Bit, 65 MSPS, Serial LVDS, 1.8 V ADC

Manufacturer
ADI
Manufacturer part #
AD9249BBCZRL7-65
Store part #
C653373
Package / case
CSPBGA-144(10x10)
Packaging
Tape & Reel (TR)
Datasheet (PDF)

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100% Authentic · 30-Day Return or Replacement · policy

10 in stock

#C653373

Stock & price checked 46 h ago

QuantityUnit pricePack price
1+₹26,927.46₹26,927.46
30+₹25,627.44₹7,68,823.20

1 × ₹26,927.46

₹26,927.46

excl. GST

₹31,774.40 incl. 18% GST

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  • GST invoice with every order
  • Standard pack: 400 per reel

AD9249BBCZRL7-65

₹26,927.46 for 1 + GST

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Specifications

Operating Temperature
-40℃~+85℃
Interface
Serial port
Voltage - Supply
1.7V~1.9V
Number of Channels
16
Integral non - linearity
0.9LSB
Voltage Reference
Built-in;External
Clock/Oscillator
External
Clock Frequency
10MHz~520MHz
Features
Multi-chip synchronization
Resolution(Bits)
65MHz;14
S/N Ratio
75dB
DNL (LSB)
0.6LSB
ADC architecture
Pipeline
Programmable Gain
Not supported

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
3A991C3
Packaging
Tape & Reel (TR)
Standard pack
400 / Reel
Sold per
Piece
Minimum order
1
Unit weight
1 g

Overview

The AD9249 is a 16-channel, 14-bit, 65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit that is designed for low cost, low power, small size, and ease of use. The device operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical. The ADC requires a single 1.8 V power supply and an LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications. The AD9249 automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. Data clock outputs (DCO±1, DCO±2) for capturing data on the output and frame clock outputs (FCO±1, FCO±2) for signaling a new output byte are provided. Individual channel power-down is supported, and the device typically consumes less than 2 mW when all channels are disabled. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI). The AD9249 is available in an RoHS-compliant, 144-ball CSPBGA. It is specified over the industrial temperature range of -40°C to +85°C.

Key features

  • Low power
  • 16 ADC channels integrated into 1 package
  • 58 mW per channel at 65 MSPS with scalable power options
  • 35 mW per channel at 20 MSPS
  • SNR: 75 dBFS (to Nyquist); SFDR: 90 dBc (to Nyquist)
  • DNL: ±0.6 LSB (typical); INL: ±0.9 LSB (typical)
  • Crosstalk, worst adjacent channel, 10 MHz, −1 dBFS: −90 dB typical
  • Serial LVDS (ANSI-644, default) Low power, reduced signal option (similar to IEEE 1596.3)
  • Data and frame clock outputs
  • 650 MHz full power analog bandwidth
  • 2 V p-p input voltage range
  • 1.8 V supply operation
  • Serial port control Flexible bit orientation Built in and custom digital test pattern generation Programmable clock and data alignment Power-down and standby modes

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