ADC3424IRTQR

The ADC342x belongs to a series of high-linearity, ultra-low-power, four-channel, 12-bit, 25MSPS to 125MSPS analog-to-digital converters (ADCs). These devices are specifically designed to support high-input frequency signals with wide dynamic range requirements and demanding applications. When the SYSREF input synchronizes the entire system, the clock input divider provides greater flexibility in system clock architecture design. The ADC342x series supports serial low-voltage differential signaling (LVDS), which reduces the number of interface lines and enables high system integration. The serial LVDS interface is a two-wire system that serially outputs the data of each ADC through two LVDS pairs. The internal phase-locked loop (PLL) doubles the incoming ADC sampling clock to obtain the bit clock used for the 12-bit output data of each channel in the serial output. In addition to the serial data stream, the data frame and bit clock are also transmitted as LVDS outputs.

Applications

• Multi-carrier, multi-mode cellular base stations
• Motor control feedback
• Network and vector analyzers
• Communications test equipment
• Non-destructive testing
• Microwave receivers
• SDR quadrature and diversity radio receivers

Key features

• Four-channel
• 12-bit resolution
• Single supply: 1.8V
• Serial LVDS interface
• Flexible input clock buffer supporting 1×, 2×, and 4× division
• At fIN = 70MHz: SNR = 70.2dBFS, SFDR = 87dBc
• Ultra-low power: 98mW per channel at 125MSPS
• Channel isolation: 105dB
• Internal dither and chopping
• Multi-chip synchronization support
• Pin-to-pin compatible with 14-bit version devices
• Package: VQFN-56 (8mm x 8mm)