CD74HC221M96

The 'HC221 and CD74HCT221 are dual monostable multivibrators with reset. An external resistor (Rₓ) and an external capacitor (Cₓ) control the timing and the accuracy for the circuit. Adjustment of Rₓ and Cₓ provides a wide range of output pulse widths from the Q and Q terminals. Pulse triggering on the B input occurs at a particular voltage level and is not related to the rise and fall time of the trigger pulse. Once triggered, the outputs are independent of further trigger inputs on A(overline) and B. The output pulse can be terminated by a LOW level on the Reset (R(overline)) pin. Trailing Edge triggering (A(overline)) and leading-edge-triggering (B) inputs are provided for triggering from either edge of the input pulse. On power up, the IC is reset. If either Mono is not used each input (on the unused device) must be terminated either high or low. The minimum value of external resistance, Rₓ, is typically 500Ω. The minimum value of external capacitance, Cₓ, is 0pF. The calculation for the pulse width is tₓ = 0.7RₓCₓ at Vcc = 4.5V.

Key features

• Overriding RESET Terminates Output Pulse
• Triggering from the Leading or Trailing Edge
• Q and Q(overline) Buffered Outputs
• Separate Resets
• Wide Range of Output-Pulse Widths
• Schmitt Trigger on B Inputs
• Fanout (Over Temperature Range)
• Standard Outputs 10 LSTTL Loads
• Bus Driver Outputs 15 LSTTL Loads
• Wide Operating Temperature Range: -55℃ to 125℃
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
• 2V to 6V Operation
• High Noise Immunity: NIL = 30%, NIH = 30% of Vcc at Vcc = 5V
• HCT Types
• 4.5V to 5.5V Operation
• Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
• CMOS Input Compatibility, II ≤ 1μA at VOL, VOH