EM74LVC125APW

EM74LVC125A is a quad buffer/line driver with 3-state outputs controlled by output enable inputs (nOE). When nOE is HIGH, the outputs are placed in a high-impedance off-state. Inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. Schmitt-trigger action on all inputs allows the circuit to tolerate slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially damaging backflow current when the device is powered down.

Key features

• Wide supply voltage range: 1.2 V ~ 5.5 V
• Input overvoltage tolerance up to 5.5 V
• CMOS low power consumption
• I_OFF circuitry supports partial power-down mode operation
• Latch-up performance exceeds 250 mA
• Direct TTL-level interface compatible
• JEDEC standards compliant: JESD8-7A (1.65 V to 1.95 V), JESD8-5A (2.3 V to 2.7 V), JESD8-C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
• ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 6000 V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
• Multiple package options