SN74AUC2G240DCTR

This dual buffer/driver is operational at 0.8 V to 2.7 VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC2G240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. This device is organized as two 1-bit buffers/drivers with separate output-enable (OE(overline)) inputs. When OE(overline) is low, the device passes data from the A input to the Y output. When OE(overline) is high, the outputs are in the high-impedance state. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Applications

• Three-state memory address driver
• Clock driver
• Bus-oriented receivers and transmitters

Key features

• Available in the Texas Instruments NanoFree Package
• Optimized for 1.8-V Operation and Is 3.6-V I/O
• Tolerant to Support Mixed-Mode Signal Operation
• Ioff Supports Partial-Power-Down Mode Operation
• Sub-1-V Operable
• Max tp d of 1.8 ns at 1.8 V
• Low Power Consumption, 10 μA at 1.8 V
• ±8-mA Output Drive at 1.8 V
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A), 200-V Machine Model (A115-A), 1000-V Charged-Device Model (C101)