Nexperia
74LVC245APW,118Schmitt trigger 1.2V~3.6V 8 1 2.9ns@3.3V,50pF TSSOP-20 Buffers, Drivers, Receivers, Transceivers RoHS
From
₹28.44
2,50,360 in stock

1 8 TSSOP-24 Buffers, Drivers, Receivers, Transceivers RoHS
8-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and 3-State Outputs
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100% Authentic · 30-Day Return or Replacement · policy
16,093 in stock
#C465742
Stock & price checked 6 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹144.06 | ₹144.06 |
| 10+ | ₹120.38 | ₹1,203.80 |
| 30+ | ₹108.64 | ₹3,259.20 |
| 100+ | ₹96.91 | ₹9,691.00 |
| 500+ | ₹83.01 | ₹41,505.00 |
| 1,000+ | ₹79.31 | ₹79,310.00 |
1 × ₹144.06
₹144.06
excl. GST
₹169.99 incl. 18% GST
SN74AVC8T245PWR
₹144.06 for 1 + GST
This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC8T245 is optimized to operate with V_CCA/V_CCB set at 1.4 V to 3.6 V. The device is operational with V_CCA/V_CCB as low as 1.2 V. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVC8T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVC8T245 is designed so that the control pins (DIR and OE(overline)) are supplied by V_CCA. The SN74AVC8T245 solution is compatible with a single-supply system and can be replaced later with a '245 function, with minimal printed circuit board redesign. This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down. The V_CC isolation feature ensures that if either V_CC input is at GND, both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE shall be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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