
SN74HC393PWR
Falling Edge 2 36MHz TSSOP-14 Counters, Dividers RoHS
Dual 4-Bit Binary Counters
- Manufacturer
- TI
- Manufacturer part #
- SN74HC393PWR
- Store part #
- C2675459
- Package / case
- TSSOP-14
- Category
- Counters, Dividers
- Packaging
- Tape & Reel (TR)
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement · policy
2,843 in stock
#C2675459
Stock & price checked 6 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹69.81 | ₹69.81 |
| 10+ | ₹59.63 | ₹596.30 |
| 30+ | ₹52.47 | ₹1,574.10 |
| 100+ | ₹46.62 | ₹4,662.00 |
| 500+ | ₹44.66 | ₹22,330.00 |
| 1,000+ | ₹43.59 | ₹43,590.00 |
1 × ₹69.81
₹69.81
excl. GST
₹82.38 incl. 18% GST
- Dispatch in 7–10 working days
- GST invoice with every order
- Standard pack: 2,000 per reel
SN74HC393PWR
₹69.81 for 1 + GST
Specifications
- Logic Family
- 74HC
- Voltage - Supply
- 2V~6V
- Trigger Type
- Falling Edge
- Operating Temperature
- -40℃~+85℃
- Reset
- Asynchronous
- Number of Elements
- 2
- Count Rate
- 36MHz
- Features
- Cascade counter;Reset function
Packaging & compliance
- RoHS
- ROHS3 Compliant
- Lifecycle
- Active
- ECCN
- EAR99
- Packaging
- Tape & Reel (TR)
- Standard pack
- 2,000 / Reel
- Sold per
- Piece
- Minimum order
- 1
- Unit weight
- 0.1 g
Overview
Wide operating voltage range of 2V to 6V; output can drive up to 10 LSTTL loads; low power consumption: 80μA maximum ICC; typical tpd = 13ns; output drive of ±4mA at 5V; low input current, 1μA maximum; dual 4-bit binary counters with separate clocks; direct clear for each 4-bit counter; reduces counter package count by 50%, significantly improving system density. The HC393 device contains eight flip-flops and additional gating to implement two independent 4-bit counters in a single package.
Key features
- Wide Operating Voltage Range of δ₂V for all cases to 6 V
- Outputs Can Drive Up To 10 LSTTL Loads
- Low Power Consumption, 80-μA Max ICC
- Typical propagation delay time (tₚd) = 13 ns
- ±4-mA Output Drive at 5 V
- Low Input Current of 1 μA Max
- Dual 4-Bit Binary Counters With Individual Clocks
- Direct Clear for Each 4-Bit Counter
- Can Significantly Improve System Densities by Reducing Counter Package Count by 50 Percent
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