SN74LV393ATPWRQ1
Falling Edge 2 70MHz TSSOP-14 Counters, Dividers RoHS
Dual 4-Bit Binary Counters
- Manufacturer
- TI
- Manufacturer part #
- SN74LV393ATPWRQ1
- Store part #
- C2675500
- Package / case
- TSSOP-14
- Category
- Counters, Dividers
- Packaging
- Tape & Reel (TR)
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement · policy
1,394 in stock
#C2675500
Stock & price checked 6 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹71.89 | ₹71.89 |
| 10+ | ₹62.18 | ₹621.80 |
| 30+ | ₹57.43 | ₹1,722.90 |
| 100+ | ₹52.47 | ₹5,247.00 |
| 500+ | ₹49.67 | ₹24,835.00 |
| 1,000+ | ₹48.14 | ₹48,140.00 |
1 × ₹71.89
₹71.89
excl. GST
₹84.83 incl. 18% GST
- Dispatch in 7–10 working days
- GST invoice with every order
- Standard pack: 2,000 per reel
SN74LV393ATPWRQ1
₹71.89 for 1 + GST
Specifications
- Logic Family
- 74LV
- Voltage - Supply
- 2V~5.5V
- Direction
- Up Counter
- Trigger Type
- Falling Edge
- Timing
- Synchronous
- Operating Temperature
- -40℃~+105℃
- Reset
- Asynchronous
- Number of Elements
- 2
- Propagation Delay
- 14.5ns@5V,50pF
- Count Rate
- 70MHz
- Features
- Reset function
Packaging & compliance
- RoHS
- ROHS3 Compliant
- Lifecycle
- Active
- ECCN
- EAR99
- Packaging
- Tape & Reel (TR)
- Standard pack
- 2,000 / Reel
- Sold per
- Piece
- Minimum order
- 1
- Unit weight
- 0.282 g
Overview
The SN74LV393A contains eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. This device is designed for 2-V to 5.5-V VCC operation. This device comprises two independent 4-bit binary counters, each having a clear (CLR) and a clock (CLK) input. The device changes state on the negative-going transition of the CLK pulse. N-bit binary counters can be implemented with each package, providing the capability of divide by 256. The SN74LV393A has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system timing signals. This device is fully specified for partial-power-down applications using l0P. The I0ff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Applications
- Automotive electronics
Key features
- Qualified for Automotive Applications
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
- Exceeds 200 V Using Machine Model τ(C=200 pF, R=0)
- 2-V to 5.5-V VCC Operation
- Max tpd of 9.5 ns at 5 V
- Typical ∀0LP (Output Ground Bounce) < 0.8ν at VCC = 3.3V, TA = 25℃
- Typical y0HV (Output ∀0H Undershoot) > 2.3 V at VCC = 3.3V, TA = 25℃
- Ioff Supports Partial-Power-Down-Mode Operation
- Dual 4-Bit Binary Counters With Individual Clocks
- Direct Clear for Each 4-Bit Counter
- Can Significantly Improve System Densities by Reducing Counter Package Count by 50 Percent
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