U3115S-JSM

U3115S is a high-voltage, high-speed power MOSFET high- and low-side gate driver IC with independent high-side and low-side referenced output channels. The U3115S employs a high-voltage compatible process that enables monolithic integration of both high- and low-side gate drive circuits. Logic input levels are compatible with CMOS or LSTTL logic outputs as low as 3.3V. The outputs feature high-current pulse capability and shoot-through prevention deadtime logic. The floating channel supports high-side N-channel power MOSFET driving, with a maximum operating voltage of 250V on the floating ground channel; this floating channel requires an external bootstrap circuit. In addition, both the high-side and low-side of the U3115S incorporate UVLO protection. The U3115S signal input ports operate in level-triggered mode — the IC functions normally as long as the voltage meets the logic requirements. The output ports have an internal push-pull structure for direct driving of power devices (MOSFET/IGBT). The low-side output port is referenced to COM, and the high-side output port is referenced to VS. When VS is at high voltage, the VB–VS voltage domain must be powered by a bootstrap circuit to operate correctly. The VS pin has a certain negative pulse withstand capability, ensuring no damage under pulse conditions of −9V, 50ns. The U3115S low-voltage section driver includes a UVLO circuit that monitors the supply voltage (VCC). Before the voltage is sufficient to drive the external MOSFET (i.e., before reaching the corresponding preset threshold), the UVLO circuit suppresses all outputs. All output ports remain low until the VCC pin voltage rises above the UVLO threshold.

Applications

• Motor control
• Power tools
• General-purpose inverters
• Pump/heat pump controllers
• Electric vehicles/self-balancing scooters

Key features

• Bootstrap-operated floating high-side channel
• Maximum operating voltage +250V
• Compatible with 3.3V, 5V, and 15V input logic
• dVs/dt immunity up to ±50V/ns
• Vs negative bias capability down to -9V
• Gate drive voltage range 5V to 20V
• Integrated UVLO circuit
• UVLO positive threshold 4.4V
• UVLO negative threshold 4.2V
• Cross-conduction prevention dead-time logic
• Dead time 200ns
• Propagation delay characteristics
• Turn-on/turn-off propagation delay Ton/Toff = 150ns/140ns
• Delay matching 50ns
• Wide temperature range -40°C to 125°C
• Output stage source/sink current capability 1.2A/1.5A
• RoHS compliant
• SOP-8