74LVC1G98GW,125

The 74LVC1G98 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be connected to VCC or GND. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in mixed 3.3V and 5V environments. This device is fully specified for partial power-down applications using IOFF. The lOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Applications

• Level translation in mixed 3.3V and 5V environments
• TTL level interface
• Low-power applications
• Partial power-down mode operation

Key features

• Wide supply voltage range from 1.65 V to 5.5 V
• 5 V tolerant input/output for interfacing with 5 V logic
• High noise immunity
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power dissipation
• IOFF circuitry provides partial Power-down mode operation
• Direct interface with TTL levels
• Inputs accept voltages up to 5 V
• Latch-up performance exceeds 250 mA
• Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V)
• ESD protection:
• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Multiple package options
• Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃