CD4011BM96

This series comprises high-voltage CMOS NAND gates rated at 20 V, including the following devices: CD4011B (quad 2-input NAND gate), CD4012B (dual 4-input NAND gate), and CD4023B (triple 3-input NAND gate). The CD4011B, CD4012B, and CD4023B provide system designers with direct NAND functionality, complementing the existing CMOS gate product family, with all inputs and outputs buffered. The CD4011B, CD4012B, and CD4023B are available in multiple package options: 14-pin hermetic ceramic DIP (suffix F3A), 14-pin plastic DIP (suffix E), 14-pin small outline package (suffixes M, MT, M96, NSR), and 14-pin thin shrink small outline package (suffix PWR); the CD4011B and CD4023B are additionally available in a 14-pin thin shrink small outline package (suffix PW).

Key features

• Typical propagation delay time of 60 ns (CL = 50 pF, VDD = 10 V)
• Buffered inputs and outputs
• Standardized symmetrical output characteristics
• Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA maximum at 25℃, 18 V
• Quiescent current 100% tested at 20 V
• 5 V, 10 V, and 15 V parametric ratings supported
• Noise margin over full package temperature range: 1 V (at VDD = 5 V); 2 V (at VDD = 10 V); 2.5 V (at VDD = 15 V)
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"