Nexperia
74LVC245APW,118Schmitt trigger 1.2V~3.6V 8 1 2.9ns@3.3V,50pF TSSOP-20 Buffers, Drivers, Receivers, Transceivers RoHS
From
₹28.71
2,48,995 in stock

1.65V~5.5V 1 2 4.6ns@3.3V,50pF VSSOP-8 Buffers, Drivers, Receivers, Transceivers RoHS
Dual Buffer Driver With 3-State Outputs
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement · policy
2,036 in stock
#C2652105
Stock & price checked 28 h ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹84.80 | ₹84.80 |
| 10+ | ₹70.67 | ₹706.70 |
| 30+ | ₹63.49 | ₹1,904.70 |
| 100+ | ₹56.53 | ₹5,653.00 |
| 500+ | ₹47.84 | ₹23,920.00 |
| 1,000+ | ₹45.88 | ₹45,880.00 |
1 × ₹84.80
₹84.80
excl. GST
₹100.06 incl. 18% GST
SN74LVC2G240DCUR
₹84.80 for 1 + GST
This dual buffer driver is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G240 device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is organized as two 1-bit buffers/drivers with separate output-enable (OE(overline)) inputs. When OE(overline) is low, the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE(overline) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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